Some complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs) contain power supply voltage domains that operate at different power supply voltage levels or values, wherein the power supply voltage level represents logic ‘1’ digital information to the corresponding domain. For instance, in a domain B, logic ‘1’ and logic ‘0’ may be represented by a 1.5 volt (V) power supply voltage level and 0 V, respectively; whereas, in a domain C, logic ‘1’ and logic ‘0’ may be represented by a 2.77 V power supply voltage level and 0 V, respectively.
From the design side, domains that operate at different power supply voltage levels create a unique challenge. For example, if there is a signal that goes from domain B to domain C, an active high value on that signal associated with a voltage of 1.5 V may be interpreted as a logic ‘0’ in domain C, assuming the threshold voltage in domain C is greater than 1.5 V. Similarly, a signal going from domain C to domain B, which has a logic value of ‘0’ but a voltage level of 1.5 Volts, may be interpreted as logic ‘1’ in domain B. Inserting a level shifter circuit, also referred to herein as a level shifter, between the two domains can solve this problem.
The present disclosure is illustrated by way of example and is not limited by the accompanying figures, in which like reference numbers indicate similar elements. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present disclosure.
The apparatus and method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present disclosure so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein. Also, the functions included in the flow diagrams do not imply a required order of performing the functionality contained therein.